A hardware acceleration of a protein folding algorithm.

The ProFAX project achieves an accelerated implementation of an Ab Initio Protein Folding Algorithm, based on Monte Carlo simulation, by using the Xilinx SDAccel toolchain targeting the Alpha Data board.

The Project

Protein folding is the physical process by which a sequence of amino acids in a protein folds into its tertiary structure, which determines the functionality of the protein. The knowledge of this structure is crucial for the development of new pharmaceutical therapies. For this reason, many drug industries are interested on applying this kind of algorithms. There are various methods to perform this process, one of the most interesting is Ab Initio modeling. This method creates the 3D-structure from energetic and geometrical features. However, although its potentiality, companies are slowed down by the high computational needing of the algorithm. A speed-up in the execution time would be crucial to enhance the productivity of such industries.

Due to the algorithm's complexity, a software implementation is inefficient from both an energetic and execution time perspective. Moving the implementation to hardware is the best way to optimize such type of algorithms. There are different hardware platforms, such as ASICs, (Application Specific Integrated Circuits) GPUs (Graphics Processing Unit) and FPGAs (Field Programmable Gate Arrays), among which the user can choose to implement the algorithm for. FPGAs offer a good trade-off between performances and power consumption. An hardware implementation on a FPGA would give the benefit of a speedup over a pure software implementation while reducing power consumption and in adding runtime hardware adaptability. The current implementation is able to reach a speedup of 1,61x with relation to a pure software implementation, and there is room for more optimization.

Politecnico di Milano
Xilinx University Program NECST Lab